От: D&R SoC NewsAlert [SoC-NewsAlert@design-reuse.com]
Отправлено: 2 ноября 2004 г. 12:41
Кому: Michael Dolinsky
Тема: D&R SoC News Alert - November 2, 2004
DR SoC News Alert
Design And ReuseDesign And ReuseDesign And Reuse
EETimes Network
November 2, 2004    


Welcome to issue of November 2, 2004 of D&R SoC News Alert, our email update to provide you with the latest news and information in the System-On-Chip Community.

SPONSORED BY: TRUE CIRCUITS, INC.

True Circuits, Inc. offers a family of award-winning clock generator, deskew, low-bandwidth and spread-spectrum PLLs and DDR DLLs that spans nearly all performance points and features typically requested by ASIC and FPGA designers.
These high-quality, low-jitter, silicon-proven hard macros are available for immediate delivery in a range of frequencies, multiplication factors, sizes and functions in TSMC, UMC and Chartered processes from 0.25um to 90nm.
Call (650) 691-2500 or visit http://www.truecircuits.com/dr9.

Cortex-M3, a 32-bit RISC Processor To Deliver High Performance In Low-Cost Applications from ARM
10 GHz Fractional-N fully integrated frequency synthesizer from NewLogic Technologies
RapidIO Verification IP (eVC) from HDL Design House
PCI Express Switch Port Core from Synopsys
Complete MPEG-4 industry standard encompassing MPEG-4 Video, MPEG-4 Audio and MPEG-4 System from Ateme
Generic Framing Procedure IP Core from Xilinx
Serial ATA (SATA) I/II PHY IP Core from Soft Mixed Signal Corp.
RF LDO w/ Ultra Low Power Mode from ChipIdea Microelectronics
Wanted IPs :
  • IEEE1394 Link Layer Controller
  • GSM-AMR vocoder with silent detection
  • Application engine synthesis offers new design approach
    System view of core clock frequency, voltage
    The fixed processor is dead, long live the battery
    Low Power System Design Techniques Using FPGAs
    How to use on-target rapid prototyping
    FPGA's vs. ASIC's
    Smart Design
    Problem Child IP Begins to Grow up
    Smart Processors
    IP/SOC PRODUCTS
    Duolog announces the availability of its integrated 802.11abg Access Point MAC and PHY
    ARM And Philips' Handshake Solutions Collaborate To Develop Clockless Processor
    DEALS
    Hong Kong Science and Technology Parks Enables Greater China's IC Designers With Synopsys' DesignWare IP Cores Portfolio
    Synaptics Finds Success with Aplus' OTP IP and design services
    Zoran Licenses And Deploys CEVA-TeakLite DSP Core To Power DVD Chipset Solution
    Renesas Technology to Introduce ESD Protection Technology from Sarnoff Europe
    BUSINESS
    Fabless industry in China to quadruple by 2008, says iSuppli
    Faraday Expands its SIP Capacities with the Establishment of the New R&D Center in NeiHu
    Mosaid Closes $14 Million Financing Agreement
    FSA Announces Fabless Fundings Total $1.5 Billion From Q1 Through Q3 2004
    MoSys Teams With Amos Technology to Expand International Sales Presence; Partnership Provides Entry into Israeli Market
    FINANCIAL RESULTS
    Artisan Components, Inc. Reports Record Total Revenue for Its Fourth Quarter and Fiscal 2004
    Mosaid Announces Preliminary Second Quarter Results for Fiscal Year 2005
    Monolithic System Technology, Inc. Announces Third Quarter 2004 Results
    Virage Logic Reports Record Revenues and Royalties for Fourth-Quarter Fiscal 2004
    LSI Logic Reports Q3 2004 Financial Results, Provides Q4 Business Outlook
    Ceva Announces Third Quarter Results - A Record 30 Million Units Shipped In The Third Quarter Reflects Strong End Markets Growth
    Faraday Reports 2004 Third Quarter Results: 10% Increase in Sequential Operating Income; Growth Expected to Continue
    PEOPLE
    Trent Poltronetti Joins IPextreme as Vice President of Marketing
    Silicon Image Appoints Seasoned Technology Counsel As Chief Legal Officer
    DESIGN SERVICES
    GDA Silicon Germanium (SIGe) chip design servics validated as Ready for IBM Technology
    EMBEDDED SYSTEMS
    Toshiba And SkipJam Team Up To Provide TX RISC-Based Complete Solutions For The Networked Digital Home
    Accelerated Technology's Nucleus RTOS Now Available for Mobile Wireless Developers Using the Freescale i.MX21 Applications Processor
    FOUNDRIES
    India moves closer to building a fab
    Worldwide IC sales to fall by 3% in September
    Chartered predicts sales decline as orders weaken
    SMIC's Q3 sales up 24%, sees 99% fab utilization
    Cadence and ARM Tackle Signal Integrity Issues For Foundry Program Partners With New Views
    No cost benefit in China wafer fab, says TSMC's Chang
    TSMC 2004 Third Quarter Report: 20% Increase in Sequential EPS
    FPGA/CPLD
    Xilinx And ISR Technologies Demonstrate World's First Software-Defined Radio Using Partial Reconfiguration of FPGAs
    TI And Xilinx Provide Easiest-To-Use Interface Solution Between High-Speed Data Converters And FPGAs
    Actel Introduces Web-Based Program for Fast Prototype Delivery
    Actel Delivers Flexible Starter Kit for its Axcelerator FPGA Family
    Actel's Axcelerator FPGAs Gain Greater Performance and Faster Timing Closure with Latest Libero Design Environment
    Xilinx Announces Immediate Availability Of Two Additional Virtex-4 Devices
    Xilinx Releases Planahead v2.1 Tool With Up To 89% Increase In Clock Frequency For Virtex Series FPGAs
    Xilinx Accelerates Virtex-4 Designs with Full-Featured Evaulation Platform at $495
    Euphonix Chooses Altera's Cyclone FPGAs and Nios II Processor for Audio Mixing Console Product Line
    EDA
    Siemens A&D Licenses Verisity's SpeXsim to Automate Verification Processes
    Synfora Announces New Release of PICO Express -- Application Engine Synthesis for Fastest SoC Design
    OTHER
    FSA Announces New Alliance with the Chinese American Semiconductor Professional Association (CASPA)

    SPONSORED BY: TEMENTO SYSTEMS

    Temento Systems, innovative provider of test, debug and verify solutions for FPGA and Hardware Platforms now offer two Edition of its DiaLite On-Chip Instrumentation tool. The new HDL Fault Finder IP included into the Power Edge Edition allows accurate monitoring and display of logic events contained into your HDL code. Designers have now the possibility to insert Watchpoints and Breakpoints on the instruments and into the code, and make it run concurrently to the instrumentation.

    Click here to know more about Temento


    IP/SOC 2004
    Grenoble, France
    December 8-9, 2004


    D&R Silicon IP / SoC Catalog :
    The world's largest directory of Silicon IP (Intellectual Property), SoC Configurable Design Platforms and SOPC Products from 200 vendors

    D&R Software IP Catalog :
    A catalog of Hardware dependent Software (HdS) ranging from embedded OS to Communication Stacks and Application Software

    D&R Verification IP Catalog :
    Speed up your verification of protocol-centric designs by finding the specific Verification IP you need (already more than 100 products listed !!!)



    Search for Silicon IP

    Search for Verification IP

    Search for Software IP

    Find an Expert

    Industry Articles

    Latest News

    Tool Demos

    Free IP Cores


    DESIGN AND REUSE S.A.

    Corporate Headquarters:
    12 rue Ampere
    BP 267
    38 016 Grenoble Cedex 1
    FRANCE
    Tel: +33 476 21 31 02
    Fax: +33 476 49 00 52

    US office:
    5600 Mowry School Road
    Suite 180
    Newark, CA 94560
    USA
    Tel: +1 510 656 1445
    Fax: +1 510 656 0995


    REGISTER:
    If this newsletter was forwarded to you by a colleague, you can have it sent directly to you at no cost. To register for D&R SoC News Alert, go to: http://www.us.design-reuse.com/users/signup.php

    UPDATE YOUR PROFILE / UNSUBSCRIBE :
    You are subscribed as dolinsky@gsu.by and you receive this Alert once a week in html format.

    * If you wish to unsubscribe, you can do it there: http://www.us.design-reuse.com/users/alert.php?u=32546&e=dolinsky@gsu.by

    * If you need to change the e-mail address at which you receive this newsletter, you can do it there

    * If you need to update your user profile for receiving this letter on another time basis or in another format, you can do it there:
    http://www.us.design-reuse.com/users/alert.php?u=32546&e=dolinsky@gsu.by

    The SoC News Alert can be delivered :
    - Twice a week, once a week or once a month
    - In html or text format

    COMMENTS / SUGGESTIONS / QUESTIONS:
    Anything about the contents of this alert can be directed to : support@design-reuse.com

    PASS IT ON. . .
    Feel free to forward this newsletter to your colleagues.